Static information storage and retrieval – Floating gate – Particular biasing
Patent
1995-03-10
1997-04-01
Nelms, David C.
Static information storage and retrieval
Floating gate
Particular biasing
3651853, 36518524, 36518514, 365218, 36518901, G11C 1134
Patent
active
056173580
ABSTRACT:
In a nonvolatile semiconductor device having a floating gate formed over a semiconductor substrate, a control gate formed over the floating gate, a source region and a drain region formed within the semiconductor substrate, an erase or write operation is carried out by Fowler-Nordheim tunneling, so that carriers such as electrons and holes are expelled from the floating gate to one of the source and drain regions. Thereafter, carriers of a channel current flowing between the source and drain regions are enhanced and injected into the floating gate, thus converging a threshold voltage of the device.
REFERENCES:
patent: 4794565 (1988-12-01), Wu et al.
Yamada, S., et al., "A Self-Convergence Erasing Scheme For A Simple Stacked Gate Flash Eeprom", IEDM Tech. Dig., pp. 307-310, 1991.
Liu, David, K.Y., et al., "Optimization of A Source-Side-Injection Famos Cell for Flash Eprom Applications", IEDM Tech. Dig., pp. 315-318, 1991.
NEC Corporation
Nelms David C.
Niranjan F.
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