Fixed coefficient high decimation filter

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G06F 1531

Patent

active

056173440

ABSTRACT:
A digital down converter with a programmable mixing down frequency and a programmable extraction bandwidth uses a ROM based sin/cos generator plus a programmable high decimation filter followed by a gain compensating scaling multiplier and a fixed FIR filter. Output format options are also programmable, and programming commands are serially loaded into registers. Various components may be isolated for efficient testing and also subsystem operation.

REFERENCES:
patent: 5257026 (1993-10-01), Thompson et al.
patent: 5425060 (1995-06-01), Roberts et al.

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