Method for estimating interconnect delays in integrated circuits

Details Method for estimating interconnect delays in integrated circuits Method for estimating interconnect delays in integrated circuits

1992-09-04

1997-04-01

Trans, Vincent N.

Boots, shoes, and leggings

364578, G06F 1750

Patent

active

056173253

ABSTRACT:
A method for predicting circuit interconnect delays in circuits of the type that have a driving device attached to an input node of a network having a plurality of nodes, with the driving device changing states from time to time so as to impose on the network a voltage different from the previous voltage of the network. The method includes the steps of estimating the waveform on the input node and predicting the waveforms on other nodes of the network on the basis of the estimated input node waveform.

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