Method of making a multi-layer lead frame

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

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438121, H01L 2150

Patent

active

060872047

ABSTRACT:
A multi-layer lead frame for use in a semiconductor package is described. The described lead frame is particularly well suited for application where fine pitch leads and/or lead multi-routing capability is required. In one embodiment, the multi-layered lead frame includes a first lead trace layer superimposed over and adhered to a second lead trace layer. The first and second lead trace layers each have a plurality of leads and each layer has an external portion and an internal portion. Each of the leads in the first trace layer has an associated lead in the second trace layer that has a matching external portion. The matching external portions are bonded together when the trace layers are superimposed. At least some of the leads in the first trace layer have different lengths than the matching leads of the second trace layer. This permits the leads to be routed separately, and may be used to facilitate finer lead pitches than would be possible in full thickness lead frames. Methods for producing such lead frames are also described.

REFERENCES:
patent: 4801765 (1989-01-01), Moyer et al.
patent: 5025114 (1991-06-01), Braden
patent: 5382546 (1995-01-01), Yamada et al.
patent: 5442231 (1995-08-01), Miyamoto et al.
patent: 5461255 (1995-10-01), Chan et al.

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