Fishing – trapping – and vermin destroying
Patent
1989-06-28
1992-01-14
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 44, 437 45, 357 2312, H01L 21265
Patent
active
050810529
ABSTRACT:
MISFET's are formed in the depletion mode in advance in a process comprising blanket implantation of the region in which memory cells are to be formed. MISFET's which are selected from these depletion-mode MISFET's are then formed into enhancement-mode or weak depletion-mode MISFET's to thereby write desired data into the memory cells of a read-only memory. The change of the MISFET's from the depletion mode into the enhancement mode (or weak depletion mode) is effected by introducing an impurity into the channel regions of the selected MISFET's in a manufacturing step that is carried out after the formation of the gate electrodes of the MISFET's.
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Tsang, P., et al, "Fabrication of High Performance LDDFET's with Oxide Sidewall-Spacer Technology", IEEE Transactions on Electron Devices, vol. ED-29, No. 4, 4/82.
Kobayashi Isamu
Shibata Ryuuji
Fourson G.
Hearn Brian E.
Hitachi , Ltd.
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