Integrating analog to digital converter run-up method and system

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341166, H03M 150

Patent

active

052007529

ABSTRACT:
A multislope A/D converter is presented which employs a multislope integration technique enabling the use of a single comparator to detect polarity changes in the integrator output voltage. The run-up interval of the integrating A/D converter is controlled by a four-step pattern that is repeated as many times as is required in order to keep the integrator output voltage within the confines of a preselected voltage range. During the first step of the four-step pattern, a positive reference charge is applied to the integrator. In the second step, a decision is made as to whether to either maintain the application of the positive reference charge to the integrator or to change over to the negative reference charge. The decision is determined such that the reference charge causes the integrator output voltage to move toward or through a preselected target voltage range. The third step is to either connect the negative reference charge to the integrator or to maintain the application of the negative reference charge. The fourth step is to decide whether to either leave the negative reference charge connected or to switch back to the positive reference charge. The preceding decision is decided such that the reference charge causes the integrator output voltage to move toward or through the preselected target voltage range. The time duration for each step can be equal or different depending on the requirements of the A/D converter.

REFERENCES:
patent: 4034364 (1977-07-01), Kukuda et al.
patent: 4357600 (1982-11-01), Ressmeyer et al.
patent: 4857933 (1989-08-01), Knight
patent: 4951053 (1990-08-01), DesJardin et al.

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