Method of forming a static random access memory device

Details Method of forming a static random access memory device Method of forming a static random access memory device

1991-04-09

1993-04-06

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 52, 437 47, 437918, H01L 2170

Patent

active

052003566

ABSTRACT:
A static random access memory device includes memory cells each having four MOS transistors and two load resistors which form a flip-flop circuit. The load resistor is formed by ion implantation of impurities in a predetermined region of an oxide film which is an extension of a gate insulating film of the MOS transistor. A power supply interconnection is connected to a surface of the load resistor. The word line and power supply interconnection are formed of a stacked structure having a polysilicon layer and a high melting metal silicide layer.

REFERENCES:
patent: 4774203 (1988-09-01), Ikeda et al.
patent: 4868537 (1989-09-01), Blanchard
patent: 4950620 (1990-08-01), Harrington, III
patent: 5013686 (1991-05-01), Choi et al.
patent: 5049970 (1991-09-01), Tanaka et al.

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