Circuit for the fast calculation of the direct or inverse cosine

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G06F 738

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048414646

ABSTRACT:
A circuit for the fast calculation of the discrete cosine transform (X.sub.i), 0.ltoreq.i.ltoreq.N-1, in which N=2.sup.n and n is an integer of a signal defined by a sequence (x.sub.i), 0.ltoreq.i.ltoreq.N-1 includes a first adder stage receiving the sequence (x.sub.i), 0.ltoreq.i.ltoreq.N-1, and supplying two sequences (x.sub.i.sup.o) and y.sub.i.sup.i) and 0.ltoreq.i.ltoreq.(N/2)-1, a group of upper half-stages receiving the sequence of x.sup.o.sub.i) and supplying the sequence (X.sub.2q) of the even components of the cosine transform. That group constitutes a circuit for the fast calculation of the cosine transform for a group of (N/2) points and a group of lower half-stages receiving the sequence (y.sub.i) and supplying the sequence (X.sub.2q+1) of the odd components of the cosine transform.

REFERENCES:
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patent: 4675836 (1987-06-01), Arnould et al.
patent: 4679163 (1987-07-01), Arnould et al.
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R. Haralick, "A Storage Efficient Way to Implement the Discrete Cosine Transform", IEEE Trans. on Computers, Jul. 1976, pp. 764-765.
W. Chen et al., "A Fast Computational Algorithm for the Discrete Cosine Transform", IEEE Trans. on Communications, vol. COM-25, No. 9, Sep. 1977, pp. 1004-1009.
B. Tseng et al., "On Computing the Discrete Cosine Transform", IEEE TRans. on Computers, vol. C-27, No. 10, Oct. 1978, pp. 966-968.
A. Jalali et al., "A High-Speed FDCT Processor for Real-Time Processing of NTSC Color TV Signal", IEEE Trans. on Electromagnetic compatibility, vol. EMC-24, No. 2, May 1982, pp. 278-286.
F. Kamangar et al., "Fast Algorithm for the 2-D Discrete Cosine Transform", IEEE Trans. on Computers, vol. C-31, No. 9, Sep. 1982, pp. 899-906.
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