System architecture for a test apparatus having primary and depe

Details System architecture for a test apparatus having primary and depe System architecture for a test apparatus having primary and depe

1985-09-18

1989-06-20

Zache, Raulfe B.

Boots, shoes, and leggings

371 22, G06F 1340

Patent

active

048414379

ABSTRACT:
A multifunction test apparatus which is capable of performing total communication network measurments and includes a primary processor linked to a number of dependent processors. The primary processor plays a number of different roles in the functioning of the test system, which roles require substantial interaction between the primary processor and dependent processors. In some test configurations, the primary processor becomes a dependent processor. In other configurations, the primary processor is timeplexed and interleaved with the operation of the dependent processors in performing subfunctions for the dependent processors. The architecture also provides for direct communication and resource sharing between the dependent processors. In another aspect of the subject invention, the primary processor performs overflow calculations for the dependent processors. Finally, the device is arranged such that all test functions are displayed with consistent screen formats.

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