Static information storage and retrieval – Floating gate – Particular biasing
Patent
1998-01-15
2000-02-22
Nelms, David
Static information storage and retrieval
Floating gate
Particular biasing
36518511, 36518522, G11C 1604
Patent
active
060287942
ABSTRACT:
A nonvolatile semiconductor memory device comprises a plurality of nonvolatile memory cells, which can be electrically programmed and erased, the plurality of nonvolatile memory cells divided into a plurality of blocks, a block erase circuit for erasing the plurality of nonvolatile memory cells contained in the plurality of blocks at the same time per block, erase operation times storage section for storing the number of erase operations of the nonvolatile memory cells to be erased at the same time by the block erase circuit per block in a number of erase operation storage region, and read time setting section for setting the read time based on the number of the erase operations stored in the number of erase operation storage region at the time of reading the storage data in the nonvolatile memory cells.
REFERENCES:
patent: 5297029 (1994-03-01), Nakai et al.
patent: 5428569 (1995-06-01), Kato et al.
patent: 5583809 (1996-12-01), Noguchi et al.
patent: 5594689 (1997-01-01), Kato
patent: 5615148 (1997-03-01), Yamamura et al.
Nakai Hiroto
Tokushige Kaoru
Ho Hoai V.
Kabushiki Kaisha Toshiba
Nelms David
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