Semiconductor memory device with improved data reading speed

Details Semiconductor memory device with improved data reading speed Semiconductor memory device with improved data reading speed

1998-08-28

2000-02-22

Mai, Son

Static information storage and retrieval

Floating gate

Particular biasing

365210, 3651852, 365208, G11C 1606, G11C 702

Patent

active

060287918

ABSTRACT:
A semiconductor memory device, arranged to increase the data reading speed, includes a memory cell array having memory cells connected to bit lines and a sense amplifier placed adjacent to the memory cell array for detecting stored data in the memory cells. A bit line control circuit controls writing into the memory cells. A data input/output buffer outputs detected data by the sense amplifier and applies externally applied input write data to the bit line control circuit.

REFERENCES:
patent: 5258958 (1993-11-01), Iwahashi et al.
patent: 5289415 (1994-02-01), DiMarco et al.
patent: 5301149 (1994-04-01), Jinbo
patent: 5321659 (1994-06-01), Taguchi
patent: 5675535 (1997-10-01), Jinbo
patent: 5773997 (1998-06-01), Stiegler

Affiliated with

Also associated with

Rating

Semiconductor memory device with improved data reading speed does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device with improved data reading speed, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device with improved data reading speed will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-525822