Multiplex communications – Wide area network – Packet switching
Patent
1994-07-26
1995-07-11
Blum, Russell W.
Multiplex communications
Wide area network
Packet switching
370 76, 329304, 332102, 375222, 375261, 375308, H04J 108
Patent
active
054327865
ABSTRACT:
A modulator receives a main signal synchronizing with a clock and a secondary signal having start and stop bits for each character. The modulator contains a unit for removing the start and stop bits from the secondary signal to generate a clock-synchronizing secondary signal. Then, the clock-synchronizing secondary signal and the main signal are modulated in parallel synchronized with a clock, and modulated signals are frequency division multiplexed. A demodulator receives a frequency division multiplexed modulated signal, and a clock-synchronizing main signal and a clock-synchronizing secondary signal are respectively regenerated by modulation and band separation. The demodulator contains a unit for inserting start and stop bits respectively before and after each character contained in the clock-synchronizing secondary signal to generate a secondary signal in a start-stop system.
REFERENCES:
patent: 4273955 (1981-06-01), Armstrong
patent: 4335464 (1982-06-01), Armstrong
patent: 4425664 (1984-01-01), Sherman et al.
patent: 4937839 (1990-06-01), Motley et al.
"A Digital Signal Processor for Modem Application" by Kohji Doi et al., 298 NEC Research & Development, 1989, Jan., No. 92, Tokyo, Japan.
Blum Russell W.
Fujitsu Limited
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