Method and circuit arrangement for controlling a serial interfac

Details Method and circuit arrangement for controlling a serial interfac Method and circuit arrangement for controlling a serial interfac

1989-09-27

1992-12-01

Heckler, Thomas M.

Boots, shoes, and leggings

364DIG2, 36492798, 3649395, G06F 1300

Patent

active

051685566

ABSTRACT:
A method and circuit for reducing the load of the microprocessor unit of a microprocessor controlled, serial interface circuit. The transmission side of the interface circuit has a first auxiliary stage that, dependent on the presetting by the microprocessor unit generates a control bit stream and transmits a data bit stream from a serial bit stream converter stage. A self-generated data bit stream generates prompter signals for the microprocessor unit and the reception side of the interface circuit has a second auxiliary stage that recognizes message changes over a predetermined time period and generates a prompter signal when the message change occurs.

REFERENCES:
patent: 4263670 (1981-04-01), Sherman
patent: 4691297 (1987-09-01), Wolff
IBM Technical Disclosure Bulletin, vol. 28, No. 6, Nov. 1985, pp. 2574-2575.
IBM Technical Disclosure Bulletin, vol. 30, No. 6, Nov. 1987, pp. 54-56.
IEEE International Conference, ICCC 82, Sep. 28-Oct. 1982, pp. 98-100.
Elektronik, vol. 36, No. 4, Feb. 20, 1987, pp. 77-80.

Affiliated with

Also associated with

Rating

Method and circuit arrangement for controlling a serial interfac does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and circuit arrangement for controlling a serial interfac, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and circuit arrangement for controlling a serial interfac will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-508229