Nonvolatile semiconductor memory device capable of preventing re

Static information storage and retrieval – Floating gate – Particular biasing

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36518909, 36518911, 365218, G11C 1606

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053413296

ABSTRACT:
A non-volatile semiconductor memory device includes a voltage supply circuit for supplying a positive voltage to the source line or bit line (to which a low biasing voltage is conventionally applied) with respect to each of non-volatile memory cells in a memory cell array in a data read mode. Since this voltage supply circuit applies the positive voltage to the memory cells in the data read mode, an effect equivalent to back gate biasing of the memory cells can be achieved. Accordingly, a memory cell in an overerase state has, a positive threshold voltage in the data read mode.

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