Method of single step damascene process for deposition and globa

Details Method of single step damascene process for deposition and globa Method of single step damascene process for deposition and globa

1998-02-20

1999-12-21

Utech, Benjamin

Semiconductor device manufacturing: process

Chemical etching

Combined with the removal of material by nonchemical means

438693, 438694, 438695, 438697, 438759, 205 93, 205157, H01L 21288, H01L 21302

Patent

active

060048808

ABSTRACT:
A modified chemical-mechanical polishing apparatus is described. The apparatus includes: (i) a polishing pad for providing a surface against which a surface of an integrated circuit substrate is polished during polishing; (ii) an anode on which the polishing pad is secured, the anode including an electrolyzable conductive material; and (iii) a voltage source including a first electrical connection and a second electrical connection, the first electrical connection being connected to the anode and the second electrical connection being configured for connection to the integrated circuit substrate undergoing polishing such that when a voltage is applied from the voltage source in the presence of slurry admixed with an electrolyte composition on the polishing pad, an electrolytic cell results in which the conductive material deposits on the surface of the integrated circuit substrate. A process of depositing a conductive material on and polishing a surface of an integrated circuit substrate simultaneously is also described.

REFERENCES:
patent: 5723387 (1998-03-01), Chen
patent: 6807165 (1998-09-01), Uzoh et al.
Morand et al., "Copper Integration in Self Aligned Dual Damascene Architecture", 1997, Symposium on VLSI Technology Digest of Technical Papers, pp. 31-32.
Tsuchiya et al., "Ultra-Low Resistance Direct Contact Cu Via Technology Using In-Situ Chemical Vapor Cleaning", 1997, Symposium on VLSI Technology Digest of Technical Papers, pp. 59-60.

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