Method for forming enhanced capacitance stacked capacitor struct

Details Method for forming enhanced capacitance stacked capacitor struct Method for forming enhanced capacitance stacked capacitor struct

1993-08-13

1994-08-23

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 60, 437193, 437919, 437233, 148DIG138, H01L 2170, H01L 2700

Patent

active

053407652

ABSTRACT:
The present invention develops a container capacitor by forming a conductively doped polysilicon plug between a pair of neighboring parallel conductive word lines; forming a planarized tetra-ethyl-ortho-silicate (TEOS) insulating layer over the parallel conductive word lines and the plug; forming a planarized borophosphosilicate glass (BPSG) insulating layer over the planarized tetra-ethyl-ortho-silicate (TEOS) insulative layer; forming an opening into both insulating layers to expose an upper surface of the plug, the opening thereby forming a container shape; forming first, second and third layers of conductively doped amorphous silicon into the container shape while simultaneously bleeding oxygen into the amorphous silicon; forming individual container structures having inner and outer surfaces and thereby exposing the BPSG insulating layer; removing the BPSG insulating layer thereby exposing the outer surface of the container structures; converting the exposed inner and outer surfaces of amorphous silicon into hemispherical grained polysilicon by subjecting the structures to a high vacuum anneal; forming a nitride insulating layer adjacent and coextensive the conductive container structure; and forming a second conductively doped polysilicon layer superjacent and coextensive the nitride insulating layer.

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patent: 5162248 (1992-11-01), Dennison et al.
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