1990-04-26
1991-11-05
Jackson, Jr., Jerome
357 2312, 357 41, 357 42, 357 67, H01L 2910, H01L 2702, H01L 2348
Patent
active
050634224
ABSTRACT:
In CMOS based integrated circuits, stricter design rules require source and drain junctions shallower than 2500 .ANG.. By using a specific device configuration, a shallow junction is obtainable while resistance to latch-up is improved and other electrical properties, e.g., low leakage current, are maintained. To achieve this result the p-channel device should have an activation energy of the junction reverse leakage current region less than 1.12 eV, with a junction dopant region shallower than 1200 .ANG. and a monotonically decreasing junction dopant profile.
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Hillenius Steven J.
Lebowitz Joseph
Liu Ruichen
Lynch William T.
AT&T Bell Laboratories
Caplan David I.
Jackson, Jr. Jerome
Ngo Ngan Van
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