Method of making asymmetrical gate field effect transistor

Fishing – trapping – and vermin destroying

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437 39, 437 40, 437184, 437228, 437235, H01L 2170

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049977792

ABSTRACT:
A field effect transistor includes a high concentration doping layer self-alignedly produced using a refractory metal silicide gate as a mask for ion implantation in a semi-insulating substrate. The distance between the refractory metal gate and the high concentration doping layer which becomes a source region is shorter than the distance between the refractory metal gate and a high concentration doping layer which becomes a drain region.
A method of producing a field effect transistor having an offset refractory metal silicide gate includes depositing a refractory metal silicide layer, a refractory metal film, and a first insulator film successively on an active layer which is produced on a semi-insulating substate. The deposited layers are patterned with a resist film for producing a gate pattern mask for etching the respective layers all at once or one-by-one. High dopant concentration source and drain regions are formed by ion implantation and annealing. A second insulator film is deposited on the entire surface of the substrate. The structure is etched to leave the second insulator film only at one side of the gate using reactive ion etching oblique to the substrate. Alternatively, the second insulator film is deposited to cover only one of the sides of the gate on the substrate. Etching is carried out at only one side of the refractory metal silicide film using the first and second insulator films as masks. Source and drain electrodes are formed after removing the first and second insulator films.

REFERENCES:
patent: 4232439 (1980-11-01), Shibata
patent: 4532698 (1985-08-01), Fang et al.
patent: 4559693 (1985-12-01), Kamei

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