Encoding method and code processing circuitry

Details Encoding method and code processing circuitry Encoding method and code processing circuitry

1991-03-27

1993-09-07

Kuntz, Curtis

Pulse or digital communications

Repeaters

Testing

375 55, 375 56, 375 81, 375 82, 375119, 341 68, 341 69, 341 73, 371 377, H04L 2710, H03D 318, H03M 506, H03M 514

Patent

active

052436284

ABSTRACT:
A novel encoding method which facilitates handling at the time of demodulation (decoding) and is capable of further alleviating a burden imposed on a demodulation (decoding) circuit. When an input NRZ code signal is at, for instance, a logical "0" level during a given unit bit time, encoding is effected to obtain a signal having the same form as that of a CMI code such that the signal is set to a logical "1" level in correspondence with a first half of the unit bit time, and to the logical "0" level in correspondence with a second half thereof. Similarly, when the input NRZ code signal is at the logical "1" level during a given unit bit time, encoding is effected to obtain a signal such that the signal is unfailingly set to the logical "1" level during its initial bit time, and thereafter only during a bit time when the NRZ code signal is at the logical "1" level during the unit bit time, the logical "1" level and the logical "0" level are alternately repeated for each unit bit time. By virtue of this encoding, a maximum interval between adjacent signal rise or fall timings is reduced to a bit time of two bits.

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patent: 4763338 (1988-08-01), Barndt, Sr.
patent: 4905257 (1990-02-01), Palkert et al.
patent: 5107263 (1992-04-01), Kim et al.
patent: 5113187 (1992-05-01), Giorshe
patent: 5117135 (1992-05-01), Lee et al.

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