Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1991-12-12

1993-09-07

LaRoche, Eugene R.

Static information storage and retrieval

Floating gate

Particular biasing

365218, 257314, G11C 1134

Patent

active

052435598

ABSTRACT:
A semiconductor memory device including a semiconductor substrate of a first conduction type, a memory cell having a floating gate and a control gate which are formed on a main surface of the semiconductor substrate and stacked with an interlayer insulating film interposed therebetween and having a three-layer structure of an oxide film, a nitride film and another oxide film, a decoder for supplying a voltage to the memory cell, a first well formed on the substrate surface and having a second conduction type different from the first conduction type, and a second well formed in the first well and having the first conduction type, wherein one of the memory cell and the decoder is formed in the second well.

REFERENCES:
patent: 4142251 (1979-02-01), Mintz
patent: 4233672 (1980-11-01), Suzuki
patent: 4642486 (1987-02-01), Honma
patent: 5097303 (1992-03-01), Taguchi
patent: 5136541 (1992-08-01), Arakawa
"Polyoxide Thinning Limitations and Superior ONO Interpoly Dielectric for Nonvolatile Memory Devices", IEEE Transaction on Electron Devices. vol. 38, No. 2, Feb. 1991 pp. 270-277.

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