Reconfigurable, multiprocessor system with protected, multiple,

Details Reconfigurable, multiprocessor system with protected, multiple, Reconfigurable, multiprocessor system with protected, multiple,

1987-10-09

1989-03-21

Heckler, Thomas M.

Boots, shoes, and leggings

G06F 1516

Patent

active

048149829

ABSTRACT:
Each processor or input/output (I/O) module in a reconfigurable, multiprocessor system contains a memory in which data for all program tasks is stored, with task data being assigned fixed memory locations. Erroneous entry into the replicated memories due to address faults is prevented by comparing the identity code of the module attempting to write into a particular segment of the memory with the stored identity codes of the processor of I/Os assigned to the task for which data storage into that segment is authorized. If the identity code correspond, data entry is permitted. If they do not, indicating that a processor not assigned to the task is attempting to write [i.e., there is an address error], data entry is prevented. Reassignment of tasks between processors only requires change in the stored identity codes without the need for transfer of the data stored in the memories.

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