Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1998-11-02
2000-10-17
Fears, Terrell W.
Static information storage and retrieval
Addressing
Plural blocks or banks
36518902, G11C 1300
Patent
active
061341738
ABSTRACT:
A programmable logic array integrated circuit has a number of programmable logic modules which are grouped together in a plurality of logic array blocks ("LABs"). The LABs are arranged on the circuit in a two dimensional array. A conductor network is provided for interconnecting any logic module with any other logic module. In addition, adjacent or nearby logic modules are connectable to one another for such special purposes as providing a carry chain between logic modules and/or for connecting two or more modules together to provide more complex logic functions without having to make use of the general interconnection network. Another network of so-called fast or universal conductors is provided for distributing widely used logic signals such as clock and clear signals throughout the circuit. Multiplexers can be used in various ways to reduce the number of programmable interconnections required between signal conductors.
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Ahanin Bahram
Cliff Richard G.
Cope L. Todd
Huang Joseph
Leong William
Altera Corporation
Fears Terrell W.
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