Semiconductor integrated delay circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

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Details

327281, 327 12, 327276, H03K 513

Patent

active

054481953

ABSTRACT:
A semiconductor integrated circuit having a plurality of power source voltages in one chip and which comprises delaying means which accurately implements a predetermined delay time into a signal. An inverter circuit block receives at its input part an output from a NAND gate. An output from the inverter circuit block is coupled to a node of a phase comparing part through a switch. The output from the inverter circuit block is also coupled through another switch to an input part of another inverter circuit block whose output is coupled to the node of the phase comparing part through still another switch. A control signal is set at a L level if the phase comparing part is to operate at a first power source voltage and set at a H level if the phase comparing part is to operate at a second power source voltage which is larger than the first power source voltage.

REFERENCES:
patent: 4122405 (1978-10-01), Tietz et al.
patent: 4675562 (1987-06-01), Herlein et al.
patent: 4845390 (1989-07-01), Chan
patent: 4970507 (1990-11-01), Cooperman et al.
patent: 5118975 (1992-06-01), Hillis et al.

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