Semiconductor device and method of producing the same

Details Semiconductor device and method of producing the same Semiconductor device and method of producing the same

1996-10-07

1999-08-24

Everhart, Caridad

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

438623, 438637, 438781, 257791, H01L 2358, H01L 21445

Patent

active

059428023

ABSTRACT:
Using a CVD method, there is deposited, on a semiconductor substrate, a first silicon oxide layer on which a porous layer is then deposited. The porous layer is then etched to form a wiring groove. Using a CVD method, a second silicon oxide layer is deposited throughout the surface of the porous layer, and the first and second silicon oxide layers are etched to form a through-hole therein. Then, a conductive layer is deposited throughout the surface of the semiconductor substrate. Then, the conductive layer is subjected to CMP to form a wiring layer composed of the conductive layer.

REFERENCES:
patent: 4885262 (1989-12-01), Ting et al.
patent: 4988514 (1991-01-01), Fukuyama et al.
patent: 5504042 (1996-04-01), Cho et al.
patent: 5569628 (1996-10-01), Yano et al.
patent: 5620531 (1997-04-01), Ikai et al.
patent: 5723909 (1998-03-01), Yano et al.
patent: 5753967 (1998-05-01), Lin
(Author Unknown) "Lithographic Patterns with Barrier Lining" IBM Tech. Disclosure Bull. vol. 32, No. 10B pp. 114-115, Mar. 1990.

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