Process of making IC isolation structure

Details Process of making IC isolation structure Process of making IC isolation structure

1985-06-26

1987-04-28

Roy, Upendra

Metal working

Method of mechanical manufacture

Assembling or joining

29571, 29576E, 148 15, 148175, 156643, H01L 2120, H01L 21302

Patent

active

046602780

ABSTRACT:
Using a structure according to one embodiment of the present invention, active elements in integrated circuitry may be completely isolated from other elements in the integrated circuitry by silicon dioxide regions surrounding the sides of the region containing the active element and a buried diffusion beneath the active element extending to all sides of the isolating silicon dioxide regions.
In one embodiment of the present invention, an isolation structure is fabricated by etching a silicon substrate to remove the silicon from the entire region occupied by the isolated active area and the isolation structure of this embodiment of the invention. A conformal layer of silicon dioxide, or other dielectric material, is then deposited on the surface of the silicon substrate. The conformal silicon dioxide layer is then anisotropically etched to remove the silicon dioxide on the bottom of the isolation region but still provide a sidewall region of silicon dioxide on the sides of the isolation region. The bottom of the isolation region is then implanted with dopant ions to provide a depletion region in the bottom of the isolation region. Crystalline silicon is then grown from the base of the isolation region to form the isolation region flush with the surface of the substrate using selective epitaxial growth.

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Anantha et al., IBM-TDB, 16 (1974), 3245.

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