LSI system including a plurality of LSI circuit chips mounted on

Details LSI system including a plurality of LSI circuit chips mounted on LSI system including a plurality of LSI circuit chips mounted on

1989-05-19

1990-08-14

Eisenzopf, Reinhard J.

Electricity: measuring and testing

Measuring, testing, or sensing electricity, per se

With rotor

371 225, G01R 3128

Patent

active

049490338

ABSTRACT:
An LSI system includes; a multi-layer print board; and a plurality of LSI circuit chips mounted on the multi-layer printed circuit board, each including a plurality of pins, a reference voltage terminal, a pin scan out terminal and a plurality of pin scan out circuits corresponding to the pins on a one-to-one basis. The multi-layer printed circuit board includes a reference voltage feeding layer formed therein in a form of a mesh or a sheet, at least one further layer overlying the reference voltage feeding layer and a plurality of through holes extending through each such further layer. By electrically connecting each reference voltage terminal of the plurality of LSI circuit chips through a corresponding through hole to the reference voltage feeding layer, a substantially equal reference voltage can be fed to each LSI and the voltage drop thereof is reduced.

REFERENCES:
patent: 4748403 (1989-05-01), Tamamura

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