Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Patent
1997-06-25
1999-08-24
Palys, Joseph E.
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
G06F 700
Patent
active
059419393
ABSTRACT:
A converter, which may be used for implementing either logarithmic or inverse-logarithmic functions, includes a memory, a multiplier, and an adder. The memory stores a plurality of parameters which are derived using a least squares method to estimate a logarithmic or inverse-logarithmic function over a domain of input values.
REFERENCES:
patent: 5331582 (1994-07-01), Sudo et al.
patent: 5343254 (1994-08-01), Wada et al.
patent: 5371609 (1994-12-01), Suzuki et al.
patent: 5600581 (1997-02-01), Dworkin
patent: 5604691 (1997-02-01), Dworkin
patent: 5642305 (1997-06-01), Wei
patent: 5703801 (1997-12-01), Wei
A Logarithmic Vector Processor for Neural Net Applications by Steve Richfield, Neurosoft, IEEE First International Conference on Neural Networks, Sheraton Harbor Island East, San Diego, California, Jun. 21-24, 1987.
A Multiplier-Less Digital Neural Network by L. Spaaneburg, B. Hoefflinger, S. Neusser, J.A.G. Nijhuis, A. Siggelkow, IMS, Stuttgart, Germany, Proceedings of the 2nd Int'l Conference on Microelectronics for Neural Networks, Oct. 16-18, 1991, Munich, F.R. Germany.
Algorithm Design for a 30 bit Integrated Logarithmic Processor by David M. Lewis and Lawrence K. YU, Department of Electrical Engineering, University of Toronto, Proceeding 9th Symposium on Computer Arithmetic, 1989, IEEE Comp. Soc. Press, pp. 192-199.
An Architecture for Addition and Subtraction of Long Word Length Numbers in the Logarithmic Number System by David M. Lewis, Member, IEEE, IEEE Transactions on Computers, vol. 39, No. 11. Nov. 1990, pp. 1325-1336.
A 30-b Integrated Logarithmic Number System Processor by Lawrence K. Yu, Member, IEEE, and David M. Lewis, Member, IEEE, IEEE Journal of Solid-State Circuits, vol. 26, No. 10, Oct. 1991, pp. 1433-1440.
An Accurate LNS Arithmetic Unit Using Interleaved Memory Function Interpolator by David M. Lewis, Department of Electrical Engineering, University of Toronto, Proceeding 11th Symposium on Computer Arithmetic, 1993, IEEE Comp. Soc. Press, pp. 2-9.
Interleaved Memory Function Interpolators with Application to an Accurate LNS Arithmetic Unit by David M. Lewis, Member, IEEE, IEEE Transactions on Computers, vol. 43, No. 8, Aug. 1994, pp. 974-982.
Table-Lookup Algorithms for Elementary Functions and Their Error Analysis by Ping Tak Peter Tang, Matematics and Computer Schience Division, Argonne National Laboratory, 9700 S. Cass Ave., Argonne, IL 60439-4801, Proceeding 10th Symposium on Computer Arithmetic, Jun. 1991, pp. 232-236.
Applying Features of IEEE 754 to Sign/Logarithm Arithmetic by Mark G. Arnold, Member, IEEE, Thomas A. Bailey, Member, IEEE, John R. Cowles, and Mark D. Winkel, IEEE Transactions on Computers, vol. 41, No. 8, Aug. 1992, pp. 1040-1050.
D8.13 Improved Accuracy for Logarithmic Addition in DSP Applications by Mark G. Arnold, John Cowles, and Thomas Bailey, Computer Science Department, University of Wyoming, Laramie, WY, ICASSP 88: Int. Conf. on Acoustics, Speech and Signal Processing, vol. 3 pp. 1714-1717.
Redundant Logarithmic Number Systems by M.G. Arnold, T.A. Bailey, J.R. Cowles, J.J. Cupal, University of Wyoming, Laramie, WY, Proceeding of 9th Symposium on Computer Arithmetic, pp. 144-151, IEEE Comp. Soc. Press.
Comments on "An Architecture for Addition and Subtraction of Long Word Length Numbers in the Logarithmic Number System".sup.1 by M. Arnold, T. Bailey and J. Cowles, IEEE, Transactions on Computers, vol. 41, No. 6, Jun. 1992, pp. 786-788.
Redundant Logarithmic Arithmetic, Mark G. Arnold, Member IEEE, Thomas A. Bailey, Member IEEE, John R. Cowles, and Jerry J. Cupal, Members IEEE,IEEE Transactions on Computers, vol. 39, No. 8, Aug. 1990, pp. 1077-1086.
Pan Shao Wei
Wang Shay-Ping Thomas
Gauger James E.
Motorola Inc.
Omar Omar A.
Palys Joseph E.
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