Transient free interpolating decimator

Details Transient free interpolating decimator Transient free interpolating decimator

1990-03-01

1991-03-12

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 1531

Patent

active

049997980

ABSTRACT:
A transient-error free interpolating decimator utilizes only two comb filters. The decimator has an integrator circuit, which receives a digitized signal at a first clock rate, and a differentiator circuit. The differentiator includes first and second comb filters for down converting the digital signal at the first clock rate to a second clock rate, and for providing sample points at first and second outputs; the differentiator circuit and the integrator circuit comprise a decimation filter. A delay circuit provides coarse sampling phase adjustments by delaying the second clock rate by a predetermined number of first-clock cycles. A counter generates the second clock rate and provides coarse sampling phase adjustments by adding or deleting cycles of the first clock to or form the second clock. A multiplexer circuit swaps the two outputs when necessary to prevent transient errors generated in the differentiators from being observed. An interpolator circuit makes fine sampling phase adjustments by interpolation to provide an output that is transient-error free. The interpolator circuit includes a bypass circuit for bypassing the first output of the multiplexer circuit for preventing transient errors from being observed.

REFERENCES:
patent: 4835723 (1989-05-01), Hansen
patent: 4872129 (1989-10-01), Pfeifer et al.
patent: 4881191 (1989-11-01), Morton

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