Comparison circuit with error compensated mos switches

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307496, 307497, 307362, 307355, H03K 3023, H03K 3027, H03K 524, H03K 17687

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active

048990680

ABSTRACT:
A comparison circuit (1), obtained according to MOS technology, for comparing two input voltages and comprising a differential amplifier (8). During a first time period, a first input (-) of the differential amplifier is supplied, via a first capacitor (9) and a switch (10), with a first input voltage (Ue). During a second time period, succeeding the first time period, a second input voltage (Ud) is supplied to the first input (-) of the amplifier by means of the first capacitor and a switch (11) of a switch arrangement (10, 11). The second input (+) of the differential amplifier is connected to a reference voltage during the first time period and its output is at that time connected to the first input and to the second input (+) of the amplifier via switches (12) and (16), respectively. The second input (+) of the differential amplifier is connected through a second capacitor (13) and a change-over device (14, 15) to the reference voltage source (17). The change-over device (14, 15) alternately connects, during the two time periods, the second capacitor to the reference voltage source.

REFERENCES:
patent: 4316105 (1982-02-01), Fowler
patent: 4450368 (1984-05-01), Spence
patent: 4532438 (1985-07-01), Reiner
patent: 4547683 (1985-10-01), Bingham
patent: 4560890 (1985-12-01), Masuda et al.
patent: 4691189 (1987-09-01), Dingwall et al.
patent: 4695748 (1987-09-01), Kumamoto
patent: 4707624 (1987-11-01), Yee
patent: 4760287 (1988-07-01), Goto et al.
patent: 4803382 (1989-02-01), Tanimoto et al.
"Markt und Technik", no. 9, pp. 76, Mar. 1, 1985.
Electronics Letters, vol. 22, no. 6, pp. 338-339, Mar. 13, 1986.

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