Fishing – trapping – and vermin destroying
Patent
1985-06-26
1988-03-22
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437160, 437162, 437919, 357 51, H01L 21225
Patent
active
047328720
ABSTRACT:
The invention provides a method for making a semiconductor device including a bipolar transistor and a capacitor. An oxide film and a silicon nitride film are formed and patterned on a semiconductor substrate. A layer of polycrystalline silicon or of metal silicide containing an impurity is formed between an emitter electrode and an emitter region of the transistor and between an electrode and a thin oxide film of the capacitor. The doped polycrystalline silicon or metal silicide is then patterned to form a barrier layer protecting the oxide film and an intermediate layer acting as a diffusion source to the underlying substrate.
REFERENCES:
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patent: 4040017 (1977-08-01), Lee
patent: 4145803 (1979-03-01), Tasch
patent: 4282647 (1981-08-01), Richman
patent: 4377029 (1983-03-01), Ozawa
Ridout, "Methods of Fabricating MOSFET Integrated Circuit with Low Resistivity Interconnection Lines", IBM Tech. Disc. Bull., vol. 23, No. 6, Nov. 1980, pp. 2563-2566.
Dodds et al., "Error Tolerant Adaptive Algorithms for Delta Coding", Conference Record of the 1978 International Conference on Communications, vol. 1, 1978, pp. 8.3.1-8.3.5.
Hearn Brian E.
Quach T. N.
Tokyo Shibaura Denki Kabushiki Kaisha
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