Semiconductor device

Details Semiconductor device Semiconductor device

1987-04-20

1989-07-11

Hille, Rolf

357 71, 357 68, H01L 2906, H01L 2348, H01L 2946

Patent

active

048476730

ABSTRACT:
Grooves having a predetermined depth are formed on an insulating layer, and an electrode wiring layer is provided in the grooves of the insulating layer. The electrode wiring layer is formed to fill the grooves either completely or partially to a predetermined thickness on the inner wall surfaces of the grooves.

REFERENCES:
patent: 3947957 (1976-04-01), Luttmer
patent: 4471524 (1984-09-01), Kinsbron et al.
patent: 4566940 (1986-01-01), Itsumi et al.
patent: 4605470 (1986-08-01), Gwozdz et al.
patent: 4613888 (1986-09-01), Mase et al.
patent: 4630088 (1986-12-01), Ogura et al.
patent: 4646126 (1987-02-01), Iizuka
patent: 4682204 (1987-07-01), Shiozaki et al.
patent: 4734754 (1988-03-01), Nikawa
Mogab, C., "Dry Etching", VLSI Technology, p. 305, (1983).

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