Vertical MOSFET with reduced bipolar effects

Details Vertical MOSFET with reduced bipolar effects Vertical MOSFET with reduced bipolar effects

1987-02-12

1989-06-06

Wojciechowicz, Edward J.

357 233, 357 238, 357 2312, 357 86, 357 88, 357 89, 357 90, H01L 2978

Patent

active

048376060

ABSTRACT:
A vertical MOSFET device includes a semiconductor wafer having source, body and drain regions of alternate conductivity type disposed therein. The source and drain regions are located so as to define the length and width of a channel region in the body region at a surface of the wafer. The body region further includes a similar conductivity type supplementary region having a relatively high areal dopant concentration. The supplementary region, which can be fabricated by ion implantation, extends laterally beneath a portion of the channel region. A source electrode is disposed on one wafer surface and a drain electrode is disposed on an opposing wafer surface.

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"A Parasitic Effect-Free, High Voltage MOS ICs with Shielded Source Structure", H. Sakuma et al., IEDM, 1982, pp. 254-257.

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