Booster circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Reexamination Certificate

active

08072258

ABSTRACT:
In a booster circuit which is operated with a two-phase clock and in which a plurality of (M≧4) lines of boosting cells constitute a unit, a boosting cell in the K-th line (1≦K≦M) is controlled, depending on the voltage of the input terminal of a boosting cell in the KA-th line (KA=(K−1) when (K−1)>0, and KA=M when (K−1)=0). As a result, a charge transfer transistor can transition from the conductive state to the non-conductive state before a clock input to the boosting cell in the K-th line transitions from low to high and then boosting operation is performed. As a result, the backflow of charge via the charge transfer transistor can be reduced or prevented.

REFERENCES:
patent: 6501325 (2002-12-01), Meng
patent: 6794927 (2004-09-01), Bedarida et al.
patent: 6995603 (2006-02-01), Chen et al.
patent: 7023260 (2006-04-01), Thorp et al.
patent: 7176746 (2007-02-01), Wang et al.
patent: 2004/0263238 (2004-12-01), Thorp et al.
patent: 2007/0273431 (2007-11-01), Sakurai et al.
patent: 2008/0186081 (2008-08-01), Yamahira et al.
patent: 2009/0295452 (2009-12-01), Yamahira
patent: 2009-290992 (2009-12-01), None

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