System and method for routing connections with improved...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing

Reexamination Certificate

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Details

Other Related Categories

C716S055000, C716S126000, C716S132000

Type

Reexamination Certificate

Status

active

Patent number

08042076

Description

ABSTRACT:
A method for modeling a circuit includes generating a circuit model based on a netlist that defines a plurality of connections between a plurality of circuit elements. The circuit model includes a model of one or more of the circuit elements. The method further includes determining a wire width associated with at least a selected connection based, at least in part, on design rules associated with the netlist. Additionally, the method includes determining a wire thickness associated with the selected connection based, at least in part, on a signal delay associated with the wire thickness. Furthermore, the method also includes routing the selected connection in the circuit model using a wire having a width substantially equal to the wire width calculated for the connection and a thickness equal to the wire thickness calculated for the connection and storing the circuit model in an electronic storage media.

REFERENCES:
patent: 6230304 (2001-05-01), Groeneveld et al.
patent: 7669161 (2010-02-01), Lin
patent: 2006/0080628 (2006-04-01), Enomoto et al.
patent: 2006/0206845 (2006-09-01), Rao et al.
patent: 2008/0308816 (2008-12-01), Miller et al.
PCT Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authorityfor International Application No. PCT/US2009/040460; 10 pages, Jan. 12, 2010.

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