Semiconductor device and manufacturing method of the same

Details Semiconductor device and manufacturing method of the same Semiconductor device and manufacturing method of the same

2008-04-14

2011-11-08

Ho, Tu-Tu (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Including dielectric isolation means

C257S374000, C257SE29020, C257SE21546, C257S382000, C257S377000, C257SE21593, C438S435000, C438S296000, C438S655000

Reexamination Certificate

active

08053860

ABSTRACT:
An excessive metallic film on a device isolation region is prevented from contributing to silicidation in an end of a source-drain diffusion layer region to thereby form a silicide film with uniform film thickness. There are sequentially conducted a step of forming a device isolation region3in a substrate1including a silicon layer at least in a surface thereof and filling a first insulator in the device isolation region3, a step of making height of an upper surface of the first insulator less than height of an upper surface of the substrate1and forming a sidewall film10on a sidewall of the device isolation region3, and a step of depositing a metallic film11on the substrate1and then conducting silicidation through a thermal process.

REFERENCES:
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International Search Report for PCT/JP2008/057305 mailed Jul. 15, 2008.
T. Ohguro et al., “Nitrogen-doped nickel monosilicide technique for deep submicron CMOS salicide”, Proceedings of International Electron Devices Meeting (1995), 18.3.1-18.3.4.
L.P. Ren et al., “Advanced Silicide for Sub-0.18μm CMOS on Ultra-thin (35nm) SOI”, IEEE International SOI Conference, Oct. 1999, p. 88-89.

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