Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate
2009-10-12
2011-11-01
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Logic design processing
C716S118000, C716S119000, C716S130000, C716S136000
Reexamination Certificate
active
08051397
ABSTRACT:
Method and system for conducting design explorations of an integrated circuit are disclosed. In one embodiment, the method includes obtaining a design description of the integrated circuit that includes a virtual design block, creating a representative netlist for representing the virtual design block, where the representative netlist includes one or more soft design models, and each soft design model comprises one or more template cells for modeling a portion of the integrated circuit. The method further includes defining physical attributes for the one or more soft design models in accordance with area requirements of the virtual design block, where the one or more soft design models are described with flexible shape and pin locations, performing design explorations of the integrated circuit using the one or more soft design models and their corresponding template cells, and generating a representative implementation of the integrated circuit using results of the design explorations.
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Cheong Kit Lam
Eichenseer Patrick John
Lee Jong-Chang
McCracken Thaddeus Clay
Nghiem Cecile
Cadence Design Systems Inc.
Dimyan Magid Y
Siek Vuthe
Vista IP Law Group LLP
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