Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Layout editor
Reexamination Certificate
2008-07-15
2011-10-04
Levin, Naum (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Layout editor
C716S125000, C716S131000, C438S697000
Reexamination Certificate
active
08032856
ABSTRACT:
A method of designing a semiconductor integrated circuit, includes dividing a layout area in which a wiring pattern is disposed, into a plurality of division areas, determining a dummy pattern disposition area provided in each of the plurality of division areas, adding a dummy pattern to the dummy pattern disposition area of each of the plurality of division areas, and combining division areas to which the dummy pattern is added. The dummy pattern disposition area is arranged away from at least one of boundaries between a corresponding division area of the plurality of division areas and adjacent division areas.
REFERENCES:
patent: 5459093 (1995-10-01), Kuroda et al.
patent: 5671152 (1997-09-01), Lavin et al.
patent: 5923563 (1999-07-01), Lavin et al.
patent: 6305000 (2001-10-01), Phan et al.
patent: 6484300 (2002-11-01), Kim et al.
patent: 6486066 (2002-11-01), Cleeves et al.
patent: 6718527 (2004-04-01), Li
patent: 6865727 (2005-03-01), Frerichs et al.
patent: 6905967 (2005-06-01), Tian et al.
patent: 7013446 (2006-03-01), Ohba et al.
patent: 7089522 (2006-08-01), Tan et al.
patent: 7146593 (2006-12-01), Travis et al.
patent: 7565638 (2009-07-01), Hoerold
patent: 2003/0229875 (2003-12-01), Smith et al.
patent: 2004/0083438 (2004-04-01), Ohba et al.
patent: 2005/0044520 (2005-02-01), Vuong et al.
patent: 2004-39951 (2004-02-01), None
patent: 2006-60051 (2006-08-01), None
Levin Naum
McGinn IP Law Group PLLC
Renesas Electronics Corporation
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