Method and system for designing semiconductor integrated...

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Layout editor

Reexamination Certificate

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C716S125000, C716S131000, C438S697000

Reexamination Certificate

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08032856

ABSTRACT:
A method of designing a semiconductor integrated circuit, includes dividing a layout area in which a wiring pattern is disposed, into a plurality of division areas, determining a dummy pattern disposition area provided in each of the plurality of division areas, adding a dummy pattern to the dummy pattern disposition area of each of the plurality of division areas, and combining division areas to which the dummy pattern is added. The dummy pattern disposition area is arranged away from at least one of boundaries between a corresponding division area of the plurality of division areas and adjacent division areas.

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