Flash memory cell and method for operating the same

Details Flash memory cell and method for operating the same Flash memory cell and method for operating the same

2009-08-18

2011-12-13

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S185050, C365S185180

Reexamination Certificate

active

08077512

ABSTRACT:
A flash memory cell according to the present invention includes a first charge-trapping region and a second charge-trapping region disposed in a semiconductor substrate, a first doped region disposed in the semiconductor substrate at a first side of the first charge-trapping region, a second doped region disposed in the semiconductor substrate at a second side of the first charge-trapping region, a first dielectric layer separating the semiconductor substrate from the first charge-trapping region and the second charge-trapping region, a first conductor disposed above the first charge-trapping region, and a second dielectric layer separating the first charge-trapping region from the first conductor, wherein the second charge-trapping region is configured to influence the conduction behavior of a carrier channel in the semiconductor substrate under the first charge-trapping region.

REFERENCES:
patent: 7112490 (2006-09-01), Hong et al.
patent: 2008/0265302 (2008-10-01), Hsiao et al.

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