Low voltage electron source with self aligned gate...

Coating processes – Electrical product produced – Electron emissive or suppressive

Reexamination Certificate

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C427S271000, C427S282000, C427S558000, C216S048000

Reexamination Certificate

active

08039042

ABSTRACT:
A method of fabricating an electron source having a self-aligned gate aperture is disclosed. A substrate is deposited on a first conductive layer. Over the first conductive layer an emitter layer is deposited. The emitter layer includes one or a plurality of spaced-apart nano-structures and a solid surface with nano-structures protruding above the surface. An insulator is conformally deposited over the emitter layer surface and forms a post from each protruding nano-structure. A second conductive layer is deposited over the insulator and the second conductive layer and the insulator are removed from the nano-structures such that apertures are formed in the second conductive layer and at least the ends of the nano-structures are exposed at the centers of said apertures.

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patent: 2003/0207505 (2003-11-01), Theiss et al.
patent: 2004/0005723 (2004-01-01), Empedocles et al.

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