Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Patent
1996-04-29
1999-03-02
Callahan, Tim
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
327589, 327390, G05F 110
Patent
active
058776508
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
A dynamic random access memory or the like needs an inner circuit to increase or boost a source voltage. In order to reliably read data written into a memory cell, for example, a word line needs to be boosted. With a change of the source voltage from of 5 V to 3.3 V, the source voltage needs to be boosted by the inner circuit. A booster circuit is used to cope with such a case. The booster circuit generates a voltage (hereinafter called a "boosted voltage") higher than the source voltage based on the source voltage.
The booster circuit must generate a boosted voltage that is stable even with a reduction in the source voltage. Further, a booster circuit for generating a stable boosted voltage using a reduced source voltage tends to be complex. A booster circuit having a simple circuit configuration would be desireable to reduce the chip area.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a booster circuit for generating a boosted voltage that is stable even with a reduction in the source voltage.
Another object of the present invention is to provide a booster circuit having a simple circuit configuration.
According to one aspect of the present invention, for achieving the above objects, there is provided a booster circuit for generating a boosted voltage higher than a source voltage, based on the source voltage, comprising an input terminal capable of being set to a first voltage and a second voltage, an output terminal, a boosting node capable of being set to the boosted voltage, a first conducting circuit for bringing the output terminal and a power voltage source into conduction in response to a voltage applied to the boosting node, a second conducting circuit for bringing the boosting node and the power voltage source into conduction in response to a voltage applied to the output terminal, a first capacitor circuit connected between the input terminal and the output terminal, which is discharged in response to the second voltage set to the input terminal and charged based on the voltage applied to the output terminal in response to the first voltage set to the input terminal, a control circuit connected to the input terminal, for supplying a third voltage in response to the second voltage set to the input terminal and supplying a fourth voltage in response to the first voltage set to the input terminal after the first capacitor circuit has been charged, and a second capacitor circuit connected between the control circuit and the boosting node, which is discharged in response to the fourth voltage outputted from the control circuit and charged based on the voltage at the boosting node in response to the third voltage outputted from the control circuit.
According to another aspect of the present invention, there is provided a booster circuit for generating a boosted voltage higher than a source voltage, based on the source voltage, comprising an input terminal capable of being set to a first voltage and a second voltage, an output terminal, a boosting node capable of being set to the boosted voltage, a first conducting circuit for bringing the output terminal and a power voltage source into conduction in response to a voltage applied to the boosting node, a first diode circuit connected between the output terminal and the boosting node so as to be in the forward direction with respect to the boosting node, a first capacitor circuit connected between the input terminal and the output terminal, which is discharged in response to the second voltage set to the input terminal and charged based on a voltage applied to the output terminal in response to the first voltage set to the input terminal, a second capacitor circuit connected between the input terminal and the boosting node, which is discharged in response to the first voltage set to the input terminal and charged based on the voltage set to the boosting node in response to the second voltage set to the input terminal, and a clamping circuit connected to the output terminal, for reducing the vol
REFERENCES:
patent: 5196996 (1993-03-01), Oh
patent: 5367489 (1994-11-01), Park et al.
patent: 5521871 (1996-05-01), Choi
patent: 5677645 (1997-10-01), Merritt
Callahan Tim
Frank Robert J.
Kim Jung Ho
OKI Electric Industry Co., Ltd.
Wood Allen
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