Memory circuit with quantum well-type carrier storage

Static information storage and retrieval – Read only systems – Semiconductive

Reexamination Certificate

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C365S103000, C365S114000, C365S072000, C365S027000

Reexamination Certificate

active

08064239

ABSTRACT:
Data is stored in a quantum-well type structure with double gate control. According to an example embodiment, a transistor-based data storage circuit includes a gate, a back gate and a semiconductor channel between the gate and the back gate. Carriers are stored in a storage pocket structure in the channel, in response to biases applied to the gate and back gate. Current passing through the channel is sensed and used to detect the stored carriers and, correspondingly, a memory state of the storage circuit.

REFERENCES:
patent: 7047391 (2006-05-01), Dally et al.
patent: 7216214 (2007-05-01), Dally et al.
patent: 2008/0316828 (2008-12-01), Hanafi et al.
Erotsun, M. Gunhan;, Kapur, Pawan; Saraswat, Krishna C., “A Highly Scalable Capacitorless Double Gate Quantum Well Single Transistor DRAM: 1T-QW DRAM,” IEEE Device Letters, 2008.

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