Method of making coplanar MOS IC structures

Details Method of making coplanar MOS IC structures Method of making coplanar MOS IC structures

1981-09-08

1983-02-08

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29576B, 29579, 29580, 148187, 427 94, H01L 21265

Patent

active

043720331

ABSTRACT:
A method of forming planar silicon structures having recessed dielectric isolation oxide regions in which the bird's beak and bird's head associated with the silicon dioxide-silicon nitride dual mask are eliminated. After forming the pad oxide-nitride dual mask, photoresist is used for patterning the active device area and creating a photoresist overhang. Arsenic ions are then implanted and diffused in the isolation regions. Then, using a low (700.degree.-800.degree. C.) temperature wet oxidation, the doped silicon is fully converted to silicon dioxide forming a standard planar structure.
A true coplanar structure is obtained by continuing the process by etching the grown oxide and causing the nitride mask to overhang the pad oxide. Then, arsenic ions of a lower energy than before are implanted and diffused in the field regions, which regions are subsequently oxidized at the same low temperature as before forming the final planar structure having completely inset oxide regions.
A second embodiment for forming a true coplanar structure, follows the above described steps to the first oxidation. During the first oxidation only a part of the doped silicon is converted to silicon dioxide. The oxide is, thereafter, etched. Next, the remainder of the doped silicon is oxidized, forming the final intended structure.

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