Signal processing method and circuit to convert analog...

Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal

Reexamination Certificate

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Details

C375S354000, C375S355000, C375S371000, C341S155000

Reexamination Certificate

active

08073091

ABSTRACT:
A phase determination unit in a signal processing circuit generates sampling clocks with different phases in a clock generator and sequentially provides them to an analog-to-digital convertor. Then, the phase determination unit obtains differences between each adjacent two signal levels in each sampled digital signal by use of the sampling clocks, and monitors a polarity change in the differences, extracts a more inappropriate phase for use in sampling from phases of the sampling clocks on the basis of the absolute values of the differences where the polarity change is detected, and determines an antiphase of the extracted phase as a phase of the sampling clock to be provided to the analog-to-digital convertor.

REFERENCES:
patent: 6097444 (2000-08-01), Nakano
patent: 6700570 (2004-03-01), Tachibana et al.
patent: 2002/0018125 (2002-02-01), Tachibana et al.
patent: 2006/0197692 (2006-09-01), Gong et al.
patent: 2007/0047690 (2007-03-01), Zhao et al.
patent: 2000-47649 (2000-02-01), None
patent: 2000-89709 (2000-03-01), None
patent: 2001-356729 (2001-12-01), None
patent: 2004-144842 (2004-05-01), None

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