Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate
2009-07-21
2011-12-06
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Logic design processing
C716S106000, C716S111000, C716S112000, C703S002000
Reexamination Certificate
active
08074194
ABSTRACT:
Ordinary minterm counting (OMC) and weighted minterm counting (WMC) are applied as combinational design discriminators to a pair of combinational designs D1and D2. OMC assigns the same weight to each minterm, while WMC assigns a weight that can vary. For application of minterm counting, D1and D2can be converted into BDDs. The size of the BDDs can be reduced by assigning binary values to some of the input variables. If the minterm counts of D1and are within a certain tolerance, then D1and D2cannot be distinguished. Even if D1and D2are determined to represent different functionalities, they may still be sufficiently related such that classification of them as differing functionalities is inappropriate. Each such test of relatedness, between a pair of designs D1and D2, can be referred to as an “exception.” Minterm counting can also be applied when don't cares are part of a design specification. Exceptions can apply to such minterm counts.
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Do Thuan
Nguyen Nha
Park Vaughan Fleming & Dowler LLP
Sahasrabuddhe Laxman
Synopsys Inc.
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