Method for forming a packaged semiconductor device having a...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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Details

C438S015000, C438S064000, C438S113000, C438S124000, C438S025000, C257SE21502, C257SE21503, C257SE21499

Reexamination Certificate

active

08080444

ABSTRACT:
A method of placing a die includes providing an embedded plane. The embedded plane has a openings, grid lines, and protruding portions. Each of the plurality of openings are surrounding by a subset of the plurality of grid lines. At least one of the protruding portions extends into one of the openings. A die is placed into one of the openings and at least one of the protruding portions bends during such placement so that it is in contact with at least a portion of a minor surface of the die.

REFERENCES:
patent: 5214846 (1993-06-01), Asami et al.
patent: 5289033 (1994-02-01), Asami et al.
patent: 5498388 (1996-03-01), Kodai et al.
patent: 6309908 (2001-10-01), Sarihan et al.
patent: 6351883 (2002-03-01), Beaumont
patent: 7521792 (2009-04-01), Ng
U.S. Appl. No. 12/419,708, filed Apr. 7, 2009.

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