Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation
Reexamination Certificate
2008-10-28
2010-11-02
Purvis, Sue (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
With pn junction isolation
C257SE29019
Reexamination Certificate
active
07825492
ABSTRACT:
A method for manufacturing an isolated vertical power device includes forming, in a back surface of a first conductivity type substrate, back isolation wall trenches that surround a conduction region of the device. In a front surface of the substrate, front isolation wall trenches are formed around the conduction region. Thereafter, a film containing a second type dopant is deposited in the front and back isolation wall trenches. In the conduction region on the back surface, conduction region trenches are formed inside the perimeter of the isolation wall trenches. A first type dopant is deposited in the conduction region trenches. The dopants are diffused from the conduction region trenches and isolation wall trenches to form a first conductivity type conduction region structure and a second conductivity type isolation wall.
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Carlson David V.
Jorgenson Lisa K.
Kuo W. Wendy
Purvis Sue
STMicroelectronics Inc.
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