ESD protection for integrated circuits having ultra thin...

Details ESD protection for integrated circuits having ultra thin... ESD protection for integrated circuits having ultra thin...

2004-11-16

2010-06-29

DeBeradinis, Robert (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C361S091100

Reexamination Certificate

active

07746606

ABSTRACT:
According to an exemplary embodiment, an integrated circuit includes a first circuit block having a first power bus. The integrated circuit further includes a second circuit block having a second power bus, where the first power bus is isolated from the second power bus. The integrated circuit further includes a first dedicated ESD bus, where the first dedicated ESD bus provides a discharge path from the first power bus to the second power bus and from the second power bus to the first power bus. The first power bus can be coupled to the first dedicated ESD bus by a first pair to bi-directional diodes, and the second power bus can be coupled to the first dedicated ESD bus by a second pair of bi-directional diodes.

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patent: 2005/0270712 (2005-12-01), Huang et al.

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