Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
2009-05-15
2010-06-29
Lam, Tuan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C326S082000
Reexamination Certificate
active
07746124
ABSTRACT:
A method of providing bias voltages for input output connections on low voltage integrated circuits. As integrated circuit voltages drop generally so does the external voltages that those circuits can handle. By placing input and output devices, in series, external voltages can be divided between the devices thereby reducing junction voltages seen by internal devices. By using external voltages as part of a biasing scheme for integrated circuit devices, stress created by the differential between external voltages and internal voltages can be minimized. Additionally device wells can be biased so that they are at a potential that is dependant on the external voltages seen by the low voltage integrated circuit.
REFERENCES:
patent: 4473758 (1984-09-01), Huntington
patent: 4484244 (1984-11-01), Avery
patent: 4556804 (1985-12-01), Dewitt
patent: 4617473 (1986-10-01), Bingham
patent: 4649292 (1987-03-01), Rusznyak
patent: 4686388 (1987-08-01), Hafner
patent: 4806789 (1989-02-01), Sakihama et al.
patent: 5120999 (1992-06-01), Schreck et al.
patent: 5170078 (1992-12-01), Hsueh et al.
patent: 5184031 (1993-02-01), Hayakawa et al.
patent: 5184033 (1993-02-01), Chiao et al.
patent: 5208488 (1993-05-01), Takiba et al.
patent: 5350951 (1994-09-01), Adachi
patent: 5506535 (1996-04-01), Ratner
patent: 5528447 (1996-06-01), McManus et al.
patent: 5570043 (1996-10-01), Churchill
patent: 5654858 (1997-08-01), Martin et al.
patent: 5719525 (1998-02-01), Khoury
patent: 5721508 (1998-02-01), Rees
patent: 5736833 (1998-04-01), Farris
patent: 5781034 (1998-07-01), Rees et al.
patent: 5844425 (1998-12-01), Nguyen et al.
patent: 5852375 (1998-12-01), Byrne et al.
patent: 5909142 (1999-06-01), Kawasaki et al.
patent: 5914626 (1999-06-01), Kim et al.
patent: 5933025 (1999-08-01), Nance et al.
patent: 5933027 (1999-08-01), Morris et al.
patent: 6005413 (1999-12-01), Schmitt
patent: 6018257 (2000-01-01), Hung et al.
patent: 6031394 (2000-02-01), Cranford, Jr. et al.
patent: 6054888 (2000-04-01), Maley
patent: 6078487 (2000-06-01), Partovi et al.
patent: 6081132 (2000-06-01), Isbara
patent: 6081412 (2000-06-01), Duncan et al.
patent: 6097237 (2000-08-01), Singh
patent: 6130556 (2000-10-01), Schmitt et al.
patent: 6140846 (2000-10-01), Chan et al.
patent: 6147846 (2000-11-01), Borg
patent: 6160428 (2000-12-01), Pasqualini
patent: 6194944 (2001-02-01), Wert
patent: 6313672 (2001-11-01), Ajit et al.
patent: 6351157 (2002-02-01), Sharpe-Geisler
patent: 6362652 (2002-03-01), Oner et al.
patent: 6388475 (2002-05-01), Clark et al.
patent: 6429716 (2002-08-01), Drapkin et al.
patent: 6577163 (2003-06-01), Waldrip et al.
patent: 6600346 (2003-07-01), Macaluso
patent: 6639772 (2003-10-01), Chuang et al.
patent: 6738242 (2004-05-01), Tong et al.
patent: WO 00/38322 (2000-06-01), None
U.S. Appl. No. 11/979,200, filed Oct. 31, 2007, Janardhanan S. Ajit.
Deng-Yuan Chen, “Design of a Mixed 3.3V and 5V PCI I/O Buffer,” Compass Design Automation, San Jose, California, U.S.A.
Broadcom Corporation
Lam Tuan
Sterne Kessler Goldstein & Fox P.L.L.C.
LandOfFree
Sub-micron high input voltage tolerant input output (I/O)... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Sub-micron high input voltage tolerant input output (I/O)..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Sub-micron high input voltage tolerant input output (I/O)... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4246847