Data processing system with partial bypass reorder buffer...

Details Data processing system with partial bypass reorder buffer... Data processing system with partial bypass reorder buffer...

2006-08-02

2010-06-01

Treat, William M (Department: 2181)

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

Commitment control or register bypass

C712S217000

Reexamination Certificate

active

07730285

ABSTRACT:
A data processing system includes a plurality of functional units that selectively execute instructions. A register file includes a plurality of registers that store data corresponding to the instructions. A reorder buffer communicates with the register file and stores the data, includes at least one bypassable buffer location, and includes at least one non-bypassable buffer location.

REFERENCES:
patent: 5497499 (1996-03-01), Garg et al.
patent: 5560032 (1996-09-01), Nguyen et al.
patent: 5583804 (1996-12-01), Seal et al.
patent: 5701493 (1997-12-01), Jaggar
patent: 5737624 (1998-04-01), Garg et al.
patent: 5740461 (1998-04-01), Jaggar
patent: 5809522 (1998-09-01), Novak et al.
patent: 5826055 (1998-10-01), Wang et al.
patent: 5832292 (1998-11-01), Nguyen et al.
patent: 5926841 (1999-07-01), Novak et al.
patent: 5970241 (1999-10-01), Deao et al.
patent: 6000016 (1999-12-01), Curtis et al.
patent: 6038653 (2000-03-01), Nguyen et al.
patent: 6112019 (2000-08-01), Chamdani et al.
patent: 6131157 (2000-10-01), Wang et al.
patent: 6279101 (2001-08-01), Witt et al.
patent: 6282630 (2001-08-01), Nguyen et al.
patent: 6412064 (2002-06-01), Wang et al.
Kucuk et al. “Low-Complexity Reorder Buffer Architecture”, Proceedings of the International Conference on Supercomputing, ACM, 2002, pp. 57-66.
Hennessy, John L. and David A. Patterson; “Computer Architecture, A Quantitative Approach”; Second Edition; Morgan Kaufmann; 1990; pp. 97, 127, 195, 242-244, 247-249, 252, 257, and 279.
Johnson, Mike; “Superscalar Microprocessor Design”; Prentice Hall; 1991; Title pages and p. 169.

Affiliated with

Also associated with

Rating

Data processing system with partial bypass reorder buffer... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data processing system with partial bypass reorder buffer..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data processing system with partial bypass reorder buffer... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4245411