Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2007-06-25
2010-06-15
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S238000, C438S381000, C257SE21497, C257SE21499, C257SE21509, C257SE21645
Reexamination Certificate
active
07736947
ABSTRACT:
A carrier including a bottom plate, an intermediate cover, and a top cover for manufacturing a memory device is introduced herein. A printed circuit board is disposed on the bottom plate, and memory elements are arranged and disposed on the PCB. The intermediate cover is used to press peripheral regions of the printed circuit board, and to expose the regions where the memory elements are formed on the printed circuit board. The printed circuit board is closely attached to a surface of the bottom plate by fixing the intermediate cover. The top cover is used to cover the memory elements formed on the printed circuit board after some manufacturing processes, and by exerting an external force, the formed memory elements are clamped down, so as to protect the memory elements from being affected by the printed circuit board in the following thermal process due to the thermal stress deformation.
REFERENCES:
patent: 4953460 (1990-09-01), Wojcik
patent: 5129573 (1992-07-01), Duffey
patent: 5277749 (1994-01-01), Griffith et al.
patent: 5804248 (1998-09-01), Hewett
patent: 6096131 (2000-08-01), Hewett
J.C. Patents
Nhu David
Phison Electronics Corp.
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